This focuses on what SPD chip with MOV heat capacity should pay attention to the reasons: SPD principle is the use of the heat from the MOV chip failure load after the role of frequency, its leakage current growing cause chip heating the heat from the body of the low melting point solder alloy melting point to cut off from the circuit to achieve the conservation purposes, MOV chip self-breakdown problems still exist in hot-melt, once the chip is hot-melt MOV breakdown, it becomes a low resistance conductor, causing the system short-circuit, sometimes from inside the arc to make the module the rapid gasification of the material, the pressure surge caused by an explosion, fire-breathing combustion, damaged equipment, and buildings. Therefore, heat from the body must breakdown in the MOV chip is achieved by hot-melt from the heat capacity of a large MOV chips breakdown before being hot-melt could insist on a longer time to ensure that heat from the body of the low melting point alloy solder melting point, namely should pay attention to MOV-chip thermal capacity reasons. On the same kinds of materials, the general only by increasing the material quality to increase heat capacity, in the case of a fixed radial size, only that the chip thickness increase the axial dimension to increase its thermal capacity; but the chip thickness also gives rise to the problem of the residual pressure is increased, so the performance requirements of the chip should be comprehensive and balanced, not too much emphasis on one.


　　3. Chip geometry, size and process the relationship between the thermal process

　　Obvious difference due to the above, SPD Manufacturing Process with MOV chips also have a distinction between general-purpose Varistor. MOVMOV chip manufacturing process with a few key processes are as follows: According to formula ingredients, mixing spray granulation → Pressing → row rubber, sintering → heat burning silver electrode. Performance of the chip manufacturing process closely linked to their strengths and weaknesses of the current burning craft of silversmithing at the last one before the small differences in the various manufacturing processes, have their own strengths.  Finally a craft there are two approaches: one is the reference to the current high-voltage surge arrester valve of the annealing process, using slow-burning heating and cooling will be merged into Bank and annealing process to complete a process in order to fully eliminate or reduce the chip's internal stress, the whole process about 25h or so to complete, so that leakage current out of the chip is usually larger, 34 × 34mm chip, is about 5 ~ 15μA; α coefficient of the lower, about 18 ~ 35. The other is the direct use of small varistors fast-fired silver production process, some tens of minutes to complete, some of this done before annealing, and some not do. This out of 34 × 34mm chip leakage current is usually ≤ 2μA; α coefficient ≥ 40. As most of SPD chip manufacturing plants are mainly the production of small varistors, this process has been widely used.

　　In the previous process guaranteed under the premise of a final heat treatment process of burning silver will greatly affect the performance of chips on the large size of the square chip in particular. A simple analysis is as follows: For a small wafer Φ20 the following terms, because it is round, and the small size, thermal expansion and contraction caused by thermal process more uniform and the magnitude is small, the stress within the chip, most concentrated in the center of a circle in the vicinity, so You can use fast burning craft of silversmithing. While the 34 × 34mm chip, since all the tracks and the large size ranges, thermal process caused by thermal expansion and contraction rate of large and uneven, rapid heating and cooling in the chip caused great stress, plus In the firing process on the thermal deformation stress. From the materials science we can see that too much stress will affect the phase change material inside, inhibit carrier movement so as to enhance grain, grain boundary resistance.Right MOV chip for its external performance U1mA voltage rise, leakage current IL decreases, α increases the coefficient, it seems that small current performance is improved.But this is only the illusion of a non-steady state, with the release of internal stress, electrical performance will be faster deterioration; and because of the increase of resistance, will reduce the 8/20μS Flow capacity, life expectancy has obvious performance curve steep change (U1mA a certain number of values to bear the impact of a sharp decline after), small-current characteristics obviously deteriorated (IL increased, α coefficient decreased rapidly); conducting 2mS square-wave energy test easier to puncture, making 8 / 20 Limit are susceptible to the impact of burst phenomena (surge of energy and stress of the structure of ceramics produced at the same time destroyed). If the stress release process, including frequency associated with the role of the external electric field, the impact mechanism is more complex, but the result is that chip performance, accelerated aging. Therefore must not be general-purpose Varistor copied the rapid firing technology to large square silver MOV chip production.

　　Practice the craft was found that if after full annealing chip (U1mA = 600 ~ 620V, IL = 8μA ±, α = 23 ±) melted down the fast simulation of 600 ℃ burn silver, its performance will undergo significant change: V1mA ≥ 660V , IL ≤ 2, α ≥ 40, but the limit 8/20μS Flow capacity and 2mS square-wave energy tolerance decreased, so the first heat treatment process and then quickly burn silver no practical significance. In this regard should draw on-chip high-voltage surge arrester annealing process and control targets, from the silver paste to improve the quality of start, will burn silver and merged into a heat-treatment process, in order to eliminate or reduce the chip stress.

　　4. Small current parameters of screening should pay attention to several issues

　　A typical ZnO varistor voltage-current characteristic curves of the following diagram shows an example, in the vicinity of 620V, the curve there is a clear at last convinced, is usually defined 1cm2 chip 1mA current flowing through the voltage U1mA/cm2 for the inflection point when the voltage [1] , also known as breakdown voltage or breakdown voltage. When the voltage applied on-chip voltage below the inflection point, the voltage and current near-linear relationship, this time a smaller non-linear coefficient α; Once the role of the on-chip voltage exceeds the inflection point voltage, the voltage will be a small increment led to a sharp increase in current, voltage and current meter emerged in a strong non-linear relationship, this time have a high nonlinear coefficient α. It is emphasized that the small size of general-purpose pressure-sensitive resistor, the varistor voltage can be approximated as a turning point U1mA voltage U1mA/cm2; and if the thickness uniformity of the impact of neglect, 34 × 34mm chip U10mA is the inflection point voltage U1mA / cm2, U1mA equivalent to only U0.1mA / cm2, non-linear coefficient α = 1/lg (U1mA/U0.1mA) is in fact characterized U0.01mA/cm2 to U0.1mA/cm2 within the scope of non-linear characteristics, we can see from the foregoing, this time turning point voltage is still below its α value should not be large; if forced through the heat treatment raise the value of this α can be interpreted as the left curve of the upper half of the drift occurs, it will certainly affect its high-current The pass-streaming capability. Based on actual experience, we recommend the α value should be controlled at between 20 to 35. Or directly under the provisions of a few current limit voltage to a more accurate description of the entire curve.

　　Leakage current IL is usually defined as 75% U1mA under the conduction current, it is characterized by a low electric field area of the conductive properties of silicon, reflecting the grain boundary carrier high and low activation energy barrier.  Its value is smaller, then expressed the need for greater energy to activate the grain boundary carrier.  If the IL is too small, the activation energy required is too large do 8/20μS Limit Flow and 2mS square test prone to burst of energy.A confusing problem is the decentralized nature of leakage current, if the IL in the 0.3 ~ 1.3 range that its dispersion is small; and if the IL within 3 to 13, then that its great dispersion. In practice, we found that after heat treatment the increase of leakage current is basically proportional to, in other words the dispersion of the two is the basic equivalent. For the 34 × 34mm chip, we recommend the following in accordance with 75% U1mA leakage flow of about 4 ~ 13μA control, both the general criteria used to meet domestic requirements, but also ensuring that the chip has good overall performance.

　　With the increase in valve geometry (multi-chip parallel), U1mA/U0.1mA reduced α-, IL increased, but because of non-linear characteristics, both change and area of not proportional.

　　From the electrical performance point of view, a different varistor Despite certain differences, through appropriate selection of parameters can be used in parallel, but the means to achieve the parallel critical, if the means of properly, then fine selection of no significance of the parameters. 在In the main case should be considered high-frequency pulse current skin effect on both flow impact (and parameter selection is almost nothing to do), but also should consider the safety of thermal protection agencies from the backup problems. Recommended the adoption of the external circuit in parallel, each one located parallel independent fail-safe institutions. Do not think that multi-chip-chip direct welded together in parallel manner, due to multi-chip welded together, as lightning chip is good heat conductor, is likely to arise in which one has expired, but most of the heat generated by other welding with chips to absorb heat from the agencies failed to low melting point solder melting point, resulting in puncture frequency chips have been, as mentioned above will leave a serious accidents.

　　5. Conclusion

　　From the use of environmental terms, SPD is usually installed in the distribution transformer (with high-voltage surge arrester) to the protected equipment (with a small pressure-sensitive resistors), with the section of the electrical environment is very complex and difficult; from the chip geometry point of view, commonly used 34 × 34mm chip size even more than the distribution based on the commonly used high-voltage surge arrester Φ32 chip, but because of the use of low-voltage systems, the chip thickness and general quite small varistors; from the use of standard terms [2] [3], SPD chip performance requirements is also part of the combination of the two high, so SPD chip manufacturing process should also be integrated both. It should be in accordance with standard requirements, refer to large international companies advanced product samples, combined with high-voltage surge arresters and small chip varistors MOV indicators requires the establishment of SPD chip product-specific performance requirements of the industry or national standards. MOV chip during selection, it should be for its manufacturing process and is equipped with a proper understanding of electrical performance parameters to make the right request, to avoid the occurrence of hidden dangers; chip makers have an obligation to correct interpretation of the user in order to jointly promote the cause of lightning protection healthy development.

　　References

　　1. Wu Han. Metal oxide nonlinear resistance characteristics and application of Tsinghua University Press, 1998.11.
　　2. GB 18802.1-2002-2002/IEC 61643-1:1998, Low Voltage Distribution System Surge Protection Device (SPD) Part 1: Performance requirements and test methods.
　　3. YD/T1235.1-2002: Communications Office (stations) low-voltage distribution systems Surge protectors technical requirements.